1. Field of the Invention
The present invention relates to a substrate process, and particularly to a substrate process for an embedded component.
2. Description of the Prior Art
FIG. 1 shows a flow chart of a conventional substrate process for an embedded component, including: Step 1 of providing a stage, Step 2 of forming at least an electronic component on the stage, Step 3 of forming a first dielectric layer on the stage, Step 4 of disposing a carrier on the first dielectric layer, Step 5 of removing the stage, Step 6 of reversing the carrier, Step 7 of eliminating residual glue, Step 8 of forming a second dielectric layer on the first dielectric layer, Step 9 of forming a plurality of openings by a microlithography process, and Step 10 of forming a redistribution layer on the second dielectric layer.
Please refer to FIGS. 1 and 2A. First, in Step 1, a stage 110 is provided. One surface 111 of the stage 110 is coated with a glue layer 112. Next, referring to FIGS. 1 and 2B, in Step 2, a plurality of electronic components 210 are disposed on the stage 110. Each electronic component 210 has an active surface 211, a back surface 212, and a plurality of contacts 213. The active surface 211 is faced to the surface 111 of the stage 110. The contacts 213 are formed on the active surface 211. Thereafter, referring to FIGS. 1 and 2C, in Step 3, a first dielectric layer 220 is formed on the stage 110. The first dielectric layer 220 covers the electronic component 210. The first dielectric layer 220 exposes the back surfaces 212 of the electronic components 210 by a planarization step. Thereafter, please refer to FIGS. 1 and 2D. In Step 4, a carrier 230 is disposed on the first dielectric layer 220. The carrier 230 is attached to the first dielectric layer 220 and the back surfaces 212 of the electronic components 210 using an adhesive tape 231. Thereafter, please refer to FIGS. 1 and 2E. In Step 5, the stage 110 is removed. Residual glue 112′ remains on the electronic components 210 during the removal of the stage 110 since the electronic components 210 are previously fixed on the stage 110 by the glue layer 112. Thereafter, referring to FIGS. 1 and 2F, in Step 6, the carrier is reversed to allow the active surfaces 211 of the electronic components 210 face up. Thereafter, referring to FIGS. 1 and 2G, in Step 7, the residual glue 112′ on the active surfaces 211 of the electronic components 210 is eliminated. Thereafter, referring to FIGS. 1 and 2H, in Step 8, a second dielectric layer 240 is formed on the first dielectric layer 220 and covers the active surfaces 211 of the electronic components 210. Thereafter, referring to FIGS. 1 and 2I, in Step 9, a plurality of openings 241 are formed on the second dielectric layer 240 by a microlithography and etching process to expose the contacts 213 of the electronic components 210. Finally, referring to FIGS. 1 and 2J, in Step 10, a redistribution layer 250 is formed on the second dielectric layer 240 to form a substrate for an embedded component 200. The redistribution layer 250 comprises a plurality of redistribution contacts 251. The redistribution contacts 251 are electrically connected to the contacts 213 of the electronic components 210. However, the conventional substrate process for an embedded component is complicated, and the active surfaces 211 tend to be contaminated by the glue layer 112 when the stage 110 is removed, because the electronic components 210 are previously attached to the stage 110. Furthermore, the openings 241 are formed by a microlithography and etching process, and accordingly the contacts 213 also tend to be contaminated by chemicals or residual chemicals tend to remain on the contacts 213 or the second dielectric layer 240.